1. Technical Field
This disclosure relates to a semiconductor device for protecting a rechargeable battery, and more particularly, to a protection IC for protecting a lithium-ion cell accommodated in a rechargeable battery pack used for portable electronic devices from overcharge, over discharge, excessive charging or discharge current, or short-circuit current.
2. Description of Related Art
Conventionally, easy-handling battery packs have been in widespread use for power sources of portable electronic devices. A battery pack is comprised of one or more secondary (rechargeable) cells accommodated in a package. Secondary cells are in general high-capacity battery cells, such as lithium-ion cells, lithium polymer batteries, or nickel hydride batteries. Because the amount of energy held inside a high-capacity battery cell is very large, intense heat is likely to be produced by overcharge, over discharge or overcurrent, which intense heat may causes fire.
To avoid such undesirable situations, a protection IC or semiconductor device is provided in the battery pack for the purpose of protecting the rechargeable cell from overcharge, over discharge, excessive charging or discharge current, short-circuit current, etc. When it becomes necessary to protect the rechargeable cell, the rechargeable cell is electrically disconnected from the battery charger or load regulator to prevent undesirable heat generation or fire.
The protection IC includes detection circuits, each of which is provided for detecting one of overcharge, over discharge, excessive charging current, excessive discharge current, and short-circuit current. When any one of the detection circuits detects an abnormal situation that requires a protecting operation, it outputs a detection signal to open the switch arranged between the rechargeable cell and the battery charger/load regulator.
However, if the circuit is designed so as to be switched off right after the detection signal is output, electric supply to the load regulator may be stopped by a very short pulse (such as noise) that is perceived as the detection signal. This results in error operations. To avoid occurrence of error operations, the switch is opened based on the detection of the abnormal condition only if output of the detection signal continues over a prescribed period of time. This prescribed time period is called a “delay time”. Different delay times are arranged depending on the types of abnormal conditions detected. For instance, delay time is shortened for more serious conditions or matters of urgency, while delay time is prolonged for minor abnormal conditions. To be more precise, delay time for protection from overcharge is about a second, delay time for protection from over discharge is about 20 ms, delay time for protection from excessive discharge current is about 12 ms, delay time for protection from excessive charging current is about 16 ms, and delay time for protection from short-circuit current is about 0.4 ms. These delay times, however, cause inspection time to be increased in characteristic inspection or shipping inspection of the protection IC, and lead to fall of mass productivity and increase of the cost.
Because in the conventional protection IC delay time is determined by the capacitances of external capacitors, it can be shortened during the inspection by reducing the capacitance of the external capacitors. However, in response to increased demand for size reduction and cost reduction of the device, the circuit design has been changed so as to incorporate an oscillator and counters into the protection IC to produce delay times, instead of using external capacitors. For this reason, test terminals for reducing or adjusting the delay times are also added to the protection IC, in place of adjustment of the capacitances of the external capacitors.
Since the protection IC is accommodated in a battery pack, miniaturization of the device (circuit) is indispensable. Addition of a single pin of the test terminal may cause the package to be replaced with a larger-size package, or cause the number of bonding pads of the test terminal to increase. As a result, the IC chip size, the required space, and the cost increase.
Japanese Laid-open Patent Publication No. 2005-12852 proposes a structure for overcoming the above-described problem, which structure is illustrated in FIG. 1. A battery pack 120 includes a protection IC 101, a rechargeable (secondary) cell 21, a discharge-control NMOS transistor M21, a charging-control NMOS transistor M22, a capacitor C21, resistors R21 and R22, and positive and negative terminals 22 and 23. A battery charger or load regulator 30 is connected to the positive and negative terminals 22 and 23. The protection IC 101 has an electric current detection terminal V− for detecting excessive charging current or excessive discharge current. The electric potential or the voltage of the electric current detection terminal V− with respect to terminal Vss is positive in electric discharge, and negative in electric charging.
In this publication, a function for reducing delay time when a negative voltage lower than the ordinary negative potential due to typical excessive charging current is applied to the electric current detection terminal V− is employed. With this structure, conventional test terminals in place of external capacitors are eliminated to maintain the package size and the chip size small.
However, in order to achieve more secure and reliable protection of the rechargeable cell in the battery pack 120, demand for more sophisticated control for protecting the secondary cell from excessive discharge current has occurred these days. For example, delay time up to actual switching-off operations should be adjusted more finely according to the amount of discharge current. For instance, the switch is opened after 10 ms delay time when the voltage at the electric current detection terminal V− becomes 0.1 V or higher, after 2 ms delay time when the V− become 0.5 V or higher, and after 0.4 ms delay time when V− reaches 0.8 V or higher. In this manner, several levels of electric potential to be detected at the electric current detection terminal V− are provided, and different delay times are selected according to the detected voltage levels. This arrangement inevitably causes the area size of the IC chip and the cost to be increased.